1. The next instruction is fetched for processing
  2. A memory address is copied from the PC to the MAR, which is then sent along the address bus while a 'read' command is sent along the control bus
  3. This instruction is then transmitted from RAM to the CPU along the data register
  4. When the instruction arrives at the CPU, it is divided into two parts:

  1. The instruction in the CIR is decoded, so that the CU knows what to do with the data in the MDR

  2. The contents of the MDR can now be processed according to the decoded instruction. Then, the ALU is used if a calculation is used OR data will be written to the accumulator if storage of an intermediate result is needed

  3. The contents of the PC are incremented ready for the next instruction

  4. Next instruction fetched for processing

  5. PC incremented

  6. Address found in the MAR is looked up in memory

  7. Contents of memory loaded into MDR

  8. Opcode decoded

  9. Contents of MDR copied to CIR so that the instruction be decoded and executed